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Post by pierregtt on Aug 25, 2021 20:25:30 GMT
Hello,
I'm designing my own version of Flash based HuCard ROM emulator for PC engine. To allow programming the Flash while the card is inserted, signal /RESET of HuCard connector is pulled low to put the data bus in high impedance state through maintaining HU6820 in reset status.
However, I observe this behavior:
If any D7-D0 data pin is forced to an opposite level than measured in idle condition (idle=no external voltage applied to data bus) , it starts oscillating with a toggling frequency of 1,79MHz (CPU frequency). The other strangeness is the pins are not in high impedance and have true drive capability as it overides the voltages that appear on the data bus while programming the Flash memory, which disturbs the process.
Is there any reason for the data bus not to be in high impedance state when /RESET is pulled low?
Thanks a lot for the help you could provide.
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Post by dshadoff on Aug 25, 2021 23:06:09 GMT
I think it would be very helpful if you could describe the hardware setup in more detail... - Specifically, which console are you using ? White PC Engine ? Duo-RX ? something else ? - what exactly is connected to the machine - are there any peripherals, especially on the rear bus (if a PC Engine or Core Grafx), and what is connected to the cartridge slot ?
Next, it would be helpful to describe the overall approach you are taking with this flash - what exactly is planned to do the programming ? internal ? external ? Why is it important that the bus be idle ? If the flash is being programmed by a separate processor (ie. not the 6280 inside the machine), was it your assumption/plan that /RESET would isolate the flash from the machine ?
It's very difficult to picture the layout without some more details...
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Post by pierregtt on Aug 26, 2021 8:14:40 GMT
Console is portable PC engine GT.
There are no peripherals connected, only the HuCard emulator attached to regular Hucard connector.
Flash programming is external and accomplished with PIC MCU (on the same smart card board as the Flash). As the PIC MCU has to take mastership of addresses and data buses while programming, both buses have to be high impedance while flashing to avoid hardware conflicts.
I took care to isolate the address bus with 74HC245 ICs as it was not sure it actually goes into high-Z with /RESET=0. However, as someone told me the data bus goes into high impedance while pulling down the /RESET pin, data bus is directly connected to: 1) the PIC port intended to do flashing, 2) flash data bus.
Data bus has to be idle to avoid conflicting with PIC while programming.
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Post by turboxray on Aug 26, 2021 17:49:09 GMT
There are two revisions to the cpu: original and rev A. It's possible that info you received was gathered from tests on rev A cpu. It's in the SGX, but outside a few coregrafx I models - you won't see it on other models (including later models).
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Post by dshadoff on Aug 27, 2021 2:01:57 GMT
Also, the CPU is not the only thing on the bus; while you can put the CPU into RESET mode, what is driving the address bus - is it floating (i.e. random) ? The 6260, 6270, internal memory and other devices may drive the data pins if the /OE signal is driven low while they believe that the address bus is showing an address which is in their range.
I would suggest that the flash be isolated from address and data (and /WE and /OE) during program or read, if it is not being written/read from the Hu6280 itself. And on that note - I have used the Hu6280 to write a flash chip directly - I relocated a small piece of code to RAM, in order to ensure that the flash chip's program sequence wasn't interrupted by code execution.
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Post by pierregtt on Aug 27, 2021 10:41:36 GMT
Thanks for the proposed suggestion. I had a look to the schematics, there can actually be 3 chips that may drive the data bus in addition to HuC6280 The RAM if /CER='0' and /RD='0' HuC6270 if /CE7='0' and /RD='0' HuC6260 if /CEK='0' and /RD='0' Video RAM does not interact with regular data bus as it has its own data path. What I've done: 1) drive all D7-D0 pin low from the PIC, 2) insure /RD (also connected to flash /OE) is high, 3) /RESET is low. As /RD is high none of the chip above can be selected. And.. I still observe the oscillation on data bus, which means it is not in high impedance. As none of the chip above is selected, the only IC that can put the bus in low impedance is HuC6280. Seems applying low level to /RESET does not put data bus from HuC6280 in high impedance... Weird... turboxray : do you mean my console may be equipped with an "unfinished" version of HuC6280 which is "buggy" is some ways?
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